PCSX2 SVN Changelog:
r4083
microVU: Implemented indirect jump address caching (speedup)
Indirect jumps (JR/JALR) get a table which stores the previously jumped-to x86 code entry points, and this table is indexed by the jump-to PC address.
If current jump is jumping to a previously jumped-to address, the table will have an entry-point, but before it is returned, the microProgram for which the entry point belongs to must be validated to see if it matches the current contents of VU memory.
The program validation check is remembered and doesn't need to be performed again until after a micro memory clear (which happens when vif writes to vu micro memory).
Download: PCSX2 SVN r4083
Download: Official Beta Plugins Pack [09 August 2010]
Source: Here
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