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EmuCR: XeniaXenia Git (2026/11/08) is compiled. Xenia is an experimental emulator for the Xbox 360. It does not run games (yet).

Xenia Git Changelog:
* [x64] Inline FLOAT16_2 in vpkd3d128 and vupkd3d128
* [x64] Truncate packed half floats and fix unpacking negative zero
* [x64] Inline vpkuhum and vpkuhus and read pack operands uniformly
* [x64] Fold constant permute controls when emitting
* [x64] Remove TODOs that no longer apply
* [x64] Average signed bytes and halfwords without a loop
* [x64] Inline the vector shifts of vsl and vsr
* [Testing] Unskip the vsl, vsr and vmaddfp cases
* [PPC] Shift each byte by its own count in vsl and vsr
* [x64] Give vmaddfp the PPC NaN fixup
* [x64] Keep tail labels valid as more tails are added
* [x64] Compute vmsum3fp128 and vmsum4fp128 bit-exactly
* [Testing] Unskip the rest of the CR1 cases
* [PPC] Treat any operand outside the single range like a denormal one
* [Testing] Stop reading memory annotations past the end of the string
* [x64] Load a constant third operand in the integer selects
* [Testing] Unskip the fsqrt, fdivs and fctiwz cases that pass
* [Testing] Expect VX from fctiwz. of an SNaN
* [x64] Give the square root of a negative number PPC's default QNaN
* [Testing] Unskip the CR1 cases that pass
* [PPC] Report inexact, overflow and zero divide in the FPSCR summary
* [x64] Let the float compare-not-equal take a constant
* [PPC] Run the OE forms of mulhw, mulhwu, mulhd and mulhdu
* [PPC] Implement vupkhpx and vupklpx
* [PPC] Implement lswi, lswx, stswi and stswx
* [PPC] Keep XER's byte count in mtxer and mfxer
* [Testing] Unskip the cases that pass and the removed vupkhpx tests
* [Testing] Skip the CR1 cases that need the inexact and underflow flags
* [PPC] Quiet an SNaN in frsp by using ToSingle
* [PPC] Compute adde's carry from a 64-bit sum
* [PPC] Splat vspltw with one swizzle
* [PPC] Convert fctiw and fctid without a branch for NaN
* [x64] Inline fres when its result is a normal single
* [x64] Inline vlogefp and vexptefp with AVX2 table gathers
* [PPC] Signal 0 x inf in the multiply-adds when the addend is a QNaN
* [PPC] Set VSCR[SAT] after saturating vector instructions
* [CPU] Compute vrefp, vlogefp, vexptefp and fres
* [PPC] Recompute the FPSCR summaries and set mffs's upper word
* [PPC] Read bracketed FPR test values as bits and fix the wrong ones
* [Docs] Various corrections to VMX128 documentation
* [CPU] Back Processor::GuestAtomic* with real guest reservations
* [CPU] Rework lwarx/stwcx reservations onto generation counters
* [CPU/x64] Inline PPC GPR/LR save-restore helpers
* [CPU] Judge XER[OV] on the low 32 bits
* [CPU] Implement mtfsb0 and mtfsb1
* [CPU] Implement XER[OV] and XER[SO] for the PPC OE forms
* [CPU] Skip the rounding to single for a denormal operand
* [CPU] Report FPSCR exceptions from the conversions to integer
* [CPU] Answer a denormal operand with default QNaN in single-precision
* [CPU] Return PPC's default QNaN from invalid add, sub, mul and div
* [CPU] Set both vcmpbfp bounds bits for a NaN operand
* [CPU] Quiet the NaN vmaxfp/vminfp returns
* [CPU] Give the multiply-add family PPC NaN semantics
* [CPU] Derive the FPSCR invalid-operation summary for CR1
* [XAM/UI] Clear gamertag before renaming a profile
* [CPU] Merge blocks forwards in ControlFlowSimplificationPass

Download: Xenia Git (2026/11/08)
Source: Here



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